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  Datasheet File OCR Text:
 19-2197; Rev 2; 1/08
KIT ATION EVALU ABLE AVAIL
2.7Gbps Dual Mux/Buffer with Loopback
General Description
The MAX3783 is a dual serial multiplexer (mux) and buffer with selectable line-side loopback for system interconnect and serial backplane applications up to 2.7Gbps. Each independent channel consists of a transmitter with fanout of two and a receiver with a 2:1 input mux. Selectable loopback paths support system testing. Operating from a single 3.3V supply, this device has current-mode logic (CML) inputs and outputs, which can be AC-coupled for PECL compatibility, if desired. The IC is packaged in a compact 48-pin TQFP-EP package with exposed pad. Typical power consumption is 1.12W. Provides Redundant Serial I/O 11ps Deterministic Jitter Selectable Loopback On-Chip 50 Termination Resistors 3.3V Power Supply Two-Port Integration
Features
MAX3783
Applications
2.7Gbps Serial Communications System Interconnect Serial Backplane Fail-Over and Protection Switching
PART MAX3783UCM MAX3783UCM+
Ordering Information
TEMP RANGE 0C to +85C 0C to +85C PIN-PACKAGE 48 TQFP-EP* 48 TQFP-EP*
*EP = Exposed pad. + Denotes a lead-free package.
Pin Configuration
Typical Application Circuit appears at end of data sheet.
SELA VCC SOA+ SOAVCC LO1A+ LO1AVCC LO2A+ LO2AVCC GND
48 47 46 45 44 43 42 41 40 39 38
GND SIASIA+ VCC LB1A LB2A LB1B LB2B VCC SIB+ SIBGND
37 36 35 34 33 32 31 30 29 28 27 26 25
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
LI2A+ LI2AVCC LI1A+ LI1AGND GND LI1BLI1B+ VCC LI2BLI2B+
MAX3783
*EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND ON THE CIRCUIT BOARD.
________________________________________________________________ Maxim Integrated Products
SELB VCC SOB+ SOBVCC LO1B+ LO1BVCC LO2B+ LO2BVCC GND
TQFP-EP*
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
2.7Gbps Dual Mux/Buffer with Loopback MAX3783
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC ...............................................-0.5V to 4.0V Continuous Current at Serial Outputs...............................36mA Voltage at SEL_, LB_ Pins ..........................-0.5V to (VCC + 0.5V) Common-Mode Input Voltage (SI_, LI_) .....-0.5V to (VCC + 0.5V) Differential Input Voltage (SI_, LI_) (Note 1) .......................2.8V Continuous Power Dissipation (TA = +85C) 48-Pin TQFP-EP (derate 27mW/C above +85C) .........1.76W Storage Ambient Temperature ..........................-55C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: The sum of the common-mode voltage and differential voltage on any input pin must be within -0.5V to (VCC + 0.5V).
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 3.0V to 3.6V, serial data rate = 2.75Gbps, TA = 0C to +85C. Typical values at VCC = 3.3V, TA = +25C, unless otherwise noted.)
PARAMETER Maximum Serial Data Rate Power Dissipation Supply Current CML Differential Output Voltage CML Differential Input Voltage CML Output Impedance CML Input Impedance Random Jitter Deterministic Jitter CML Output Edge Speed (20% to 80%) Propagation Delay Multiplexer Switch Time TTL Input Current High TTL Input Current Low tR, tF ICC VOD VID R OUT RIN Single ended Differential (Note 3) (Notes 3, 4, 5) 2.5Gbps input (Note 6) 1.25Gbps input (Note 3) LI_ to SO_, SI_ to LO_, LI_ to LO_ (Note 3) SEL_ or LB_ to valid output VIH = +2.0V to (VCC +0.3V) VIL = -0.3V to +0.8V RL = 50 to VCC, or 100 differential (Note 2) 1200 200 42.5 85 AC-coupled inputs, outputs SYMBOL CONDITIONS MIN 2.75 TYP 3.125 1.12 340 1500 1600 50 100 1 11 70 80 340 9 180 440 1.68 466 2200 2200 57.5 116 2 25 135 200 500 psRMS psp-p ps ps ns A A MAX UNITS Gbps W mA mVp-p mVp-p
Tested using a repeating 1010 pattern at 500Mbps. AC specifications are guaranteed by design and characterization. Deterministic jitter is measured with a repeating K28.5 pattern. With the peak-to-peak input swing on the selected (transmitted) CML input equal to or greater than that on the nonselected inputs. Note 6: AC specifications are guaranteed by test. Note 2: Note 3: Note 4: Note 5:
2
_______________________________________________________________________________________
2.7Gbps Dual Mux/Buffer with Loopback
Typical Operating Characteristics
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
MAX3783
ELECTRICAL EYE DIAGRAM 2.75 Gbps, 223 - 1 PRBS PATTERN
MAX3783 toc01
ELECTRICAL EYE DIAGRAM 2.75 Gbps, K28.5 PATTERN
MAX3783 toc02
ELECTRICAL EYE DIAGRAM 3.125 Gbps, K28.5 PATTERN
MAX3783 toc03
195mV/ div
195mV/ div
195mV/ div
88ps/div
88ps/div
88ps/div
SUPPLY CURRENT vs. TEMPERATURE
MAX3783 toc04
CML DIFFERENTIAL OUTPUT VOLTAGE vs. CML DIFFERENTIAL INPUT VOLTAGE
MEASURED USING 1010 PATTERN, 500Mbps 1.55 VOD (V)
MAX3783 toc05
500
1.60
450 SUPPLY CURRENT (mA)
400
1.50
350 1.45
300
250 0 15 30 45 60 75 90 TEMPERATURE (C)
1.40 200 700 1200 VID (mV) 1700 2200
DETERMINISTIC JITTER vs. CML DIFFERENTIAL INPUT VOLTAGE
MAX3783 toc06
MULITPLEXER SWITCH TIME
MAX3783 toc07
25
20
LO2A+ DJ (ps) 15 3.125Gbps 10 2.75Gbps 5 LB2A LO2A10ns 9ns
0 200 700 1200 VID (mV) 1700 2200 10ns/div
_______________________________________________________________________________________
3
2.7Gbps Dual Mux/Buffer with Loopback MAX3783
Pin Description
PIN 1, 12, 24, 30, 31, 37 2 3 4, 9, 14, 17, 20, 23, 27, 34, 38, 41, 44, 47 5 6 7 8 10 11 13 15 16 18 19 21 22 25 26 28 29 32 33 35 36 39 40 42 43 45 46 48 EP NAME GND SIASIA+ Supply Ground Serial Input A Negative, CML Serial Input A Positive, CML FUNCTION
VCC LB1A LB2A LB1B LB2B SIB+ SIBSELB SOB+ SOBLO1B+ LO1BLO2B+ LO2BLI2B+ LI2BLI1B+ LI1BLI1ALI1A+ LI2ALI2A+ LO2ALO2A+ LO1ALO1A+ SOASOA+ SELA Exposed Pad
+3.3V Supply
Line Out 1A Loopback Mode Select. TTL low selects loopback. Line Out 2A Loopback Mode Select. TTL low selects loopback. Line Out 1B Loopback Mode Select. TTL low selects loopback. Line Out 2B Loopback Mode Select. TTL low selects loopback. Serial Input B Positive, CML Serial Input B Negative, CML Serial Output B Input Select, TTL Serial Output B Positive, CML Serial Output B Negative, CML Line Out 1B Positive, CML Line Out 1B Negative, CML Line Out 2B Positive, CML Line Out 2B Negative, CML Line In 2B Positive, CML Line In 2B Negative, CML Line In 1B Positive, CML Line In 1B Negative, CML Line In 1A Negative, CML Line In 1A Positive, CML Line In 2A Negative, CML Line In 2A Positive, CML Line Out 2A Negative, CML Line Out 2A Positive, CML Line Out 1A Negative, CML Line Out 1A Positive, CML Serial Output A Negative, CML Serial Output A Positive, CML Serial Out A Input Select, TTL Ground. Must be soldered to the circuit board for proper thermal and electrical performance (see the Exposed-Pad (EP) Package section).
4
_______________________________________________________________________________________
2.7Gbps Dual Mux/Buffer with Loopback
Functional Diagram
MAX3783
1 SOA 2 CML VCC 15k SELA 0 15k LB2A SIA 2 CML 1 CML 0 15k LB1A VCC 2 LO1A 0 1 CML VCC 2 LO2A CML 2 LI2A CML 2 LI1A
Input Stages
The input amplifiers accept CML or AC-coupled PECL signals and each input has an on-chip 100 differential impedance for optimal termination, as shown in Figure 1.
MAX3783
VCC
MAX3783
IN+ 50 1.2k VCC - 0.5V VCC 50 IN-
Figure 1. Input Structure
1 SOB 2 CML VCC 15k SELB 0 15k LB2B SIB 2 CML 1 CML 0 15k LB1B VCC 2 LO1B 0 1 CML VCC 2 LO2B CML 2 LI2B CML 2 LI1B
Control Lines
TTL-compatible control lines are provided to select the MAX3783's operating mode (Table 1). SELA and SELB set the mux for channels A and B, respectively, to select LI1_ or LI2_ to connect to the SO_ output. LB1A, LB1B, LB2A, and LB2B enable loopback mode for each of the four LO_ outputs. All control lines are internally pulled high through 15k resistors.
Table 1. Operating Modes
SEL_ 0 1 SO_ LI2_ LI1_ LB_ 0 1 LO_ LI_ SI_
Output Buffers
The outputs are high-speed CML interfaces with 50 back termination, as shown in Figure 2.
Detailed Description
The MAX3783 is a 2.7Gbps dual serial mux/buffer with selectable line-side loopback for system test. Each half of the MAX3783 provides a transmitter with a fanout of two and a receiver with a 2:1 mux, as shown in the functional diagram.
Exposed-Pad (EP) Package
The exposed pad on the 48-pin TQFP-EP provides a very low thermal-resistance path for heat removal from the IC. The pad is also electrical ground on the MAX3783 and must be soldered to the circuit board for proper thermal and electrical performance.
5
_______________________________________________________________________________________
2.7Gbps Dual Mux/Buffer with Loopback MAX3783
Chip Information
VCC
MAX3783
TRANSISTOR COUNT: 2816 PROCESS: BiPOLAR
Package Information
50 50 OUT+ OUT-
(For the latest package outline information, go to www.maxim-ic.com/packages.) PACKAGE TYPE 48 TQFP-EP DOCUMENT NO. 21-0065
32mA
Figure 2. CML Output Structure
6
_______________________________________________________________________________________
2.7Gbps Dual Mux/Buffer with Loopback
Typical Application Circuit
VCC
MAX3783
VCC SOA+ IN SOA-
LO1A+ IN LO1A-
SERDES A
LI1A+ OUT SIA+ OUT SIASWITCH 1 LI1A-
LO1B+ IN
MAX3783
LO1B-
SELA SELB
LI1B+ OUT LI1B-
LB1A LB2A LB1B LB2B LO2ALO2A+ IN
LI2A+ OUT LI2ASOB+ IN SOBLO2B+ IN LO2BSIB+ OUT SIBLI2B+ OUT GND LI2BSWITCH 2
SERDES B
NOTE: COUPLING CAPACITORS AND BIAS RESISTORS ARE OPTIONAL, SHOWN FOR LVPECL OPERATION. REFER TO APPLICATION NOTES HFAN-01.0 AND HFAN-01.1 REGARDING LVPECL/CML INTERFACE. THIS SYMBOL INDICATES A CONTROLLED-IMPEDANCE TRANSMISSION LINE OF CHARACTERISTIC IMPEDANCE Z0 = 50.
_______________________________________________________________________________________
7
2.7Gbps Dual Mux/Buffer with Loopback MAX3783
Revision History
REVISION NUMBER 0 1 2 REVISION DATE 10/01 3/06 1/08 Initial release. Added lead-free device to the Ordering Information table. In the Electrical Characteristics table, modified Note 2 and added Note 6 for tR, tF; replaced package outline drawings with table. DESCRIPTION PAGES CHANGED -- 1 2, 8, 9
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.


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